发明名称 |
Method of forming low resistance vias |
摘要 |
Low resistant vias are formed by sequentially treating an opening in an interlayer dielectric and the exposed surface of a lower metal feature with an NH3 plasma followed by a N2/H2 plasma, thereby removing any oxide on the metal surface and removing residual polymers or polymeric deposits generated during etching to form the opening. Embodiments include forming a dual damascene opening in a low-k interlayer dielectric exposing the upper surface of a lower Cu or Cu alloy feature, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma and then with a N2/H2 plasma, Ar sputter etching, depositing a barrier layer lining the opening, depositing a seedlayer and filling the opening with Cu or a Cu alloy.
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申请公布号 |
US6562416(B2) |
申请公布日期 |
2003.05.13 |
申请号 |
US20010846187 |
申请日期 |
2001.05.02 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
NGO MINH VAN;HUERTAS ROBERT A.;HOPPER DAWN |
分类号 |
H01L21/02;H01L21/768;(IPC1-7):C23C14/02;H05H1/24;H01L21/20;H01L21/44;H01L21/302 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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