Circuit to eliminate bus contention at chip power up

摘要

A power-on control circuit for an integrated circuit of the type having plural voltage source. The circuit is powered on sequentially, thereby preventing bus contention. The power-on control circuit includes a power-on detection for generating an enabling signal and disabling signal to control output buffer. When the high voltage source is powered on and the low voltage is not, the output buffer is at a high impedance state to prevent bus contention. When the low voltage is powered on after the high voltage is powered on, the output buffer is at a normal state.