发明名称 Method and apparatus for enhancing computer system security
摘要 A security enhanced computer system arrangement includes a coprocessor and a multiprocessor logic controller inserted into the architecture of a conventional computer system. The coprocessor and multiprocessor logic controller is interposed between the CPU of the conventional computer system to intercept and replace control signals that are passed over certain of the critical control signal lines associated with the CPU. The multiprocessor logic controller arrangement thereby isolates the CPU of the conventional computer system from the remainder of the conventional computer system, permitting separate control over the CPU and separate control over the remainder of the computer system. By controlling the control signals that are normally passed between the CPU and the remainder of the computer system, the multiprocessor logic controller permits the coprocessor to perform highly secure operations. These secure operations, selectable by a trusted operator or built in to a cooperating operating system, verify that the computer system is a trusted computing base which can be relied upon to perform its operations properly and without compromise.
申请公布号 US6564326(B2) 申请公布日期 2003.05.13
申请号 US20010055786 申请日期 2001.10.24
申请人 HELBIG, SR. WALTER A. 发明人 HELBIG, SR. WALTER A.
分类号 G06F21/00;(IPC1-7):G06F11/30;H02H3/05 主分类号 G06F21/00
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