| 摘要 |
PROBLEM TO BE SOLVED: To provide a DRAM controller that is designed to reduce power consumption by switching off a SDRAM power source while the SDRAM is in a standby status and not required to hold data. SOLUTION: A SDRAM controller has a circuit for specifying a power status to specify an on-off status for a power of a synchronous DRAM at a reduced power consumption time, a control circuit to control an operation of each circuit accommodated in a synchronous DRAM controller by responding to instructions issued from the circuit for specifying the power status and a microprocessor, and a power control circuit to control the on-off status for the power of the synchronous DRAM. The controller controls the status for the power of the synchronous DRAM to be off based on the instruction from the microprocessor, which tells the status of the power is changed to the status of the reduced power consumption to the controller, and also controls the status for the power of the synchronous DRAM to be on based on the instruction from the microprocessor when the synchronous DRAM is changed to a normal status.
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