发明名称 MULTIPLE SOURCES FOR INSTRUCTION DECODE
摘要 In one embodiment, a processor contains multiple instruction sources and selects the proper source to provide an instruction to the decoder. Each of the instruction sources may provide an instruction to a multiplexer. The instruction sources also provide a signal to a second multiplexer indicative of the size of the instruction.
申请公布号 KR20030036844(A) 申请公布日期 2003.05.09
申请号 KR20037004440 申请日期 2003.03.27
申请人 发明人
分类号 G06F9/30;G06F9/32;G06F9/38 主分类号 G06F9/30
代理机构 代理人
主权项
地址