发明名称 INPUT/OUTPUT CIRCUIT WITH SIGNAL LEVEL CONVERSION FUNCTION AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE EQUIPPED THEREWITH
摘要 PROBLEM TO BE SOLVED: To remove restrictions on the order of power supply turn-on. SOLUTION: An abnormal logic detection circuit 8a monitors the logical state of connection points N15 and N24 within a buffer circuit 33. When only a second power supply VDD2 is turned on, the logical state of connection points N13 and N23 becomes indefinite. When an abnormal logical state ('H', 'L') which makes the output transistors Q13 and Q14 go simultaneously to the on- operation state continues for a prescribed period, the abnormal logic detection circuit 8a drives a reset transistor Q16 to be turned on, the connection point N13 is connected to GND, and the output transistor Q13 performs the off operation. An unwanted current path from the 2nd power supply VDD2 to the GND via the output transistors Q13 and Q14 is shielded. Transistor Q15 for pull-up is brought to the off-operation state, an unwanted current path to the GND via the 2nd power supply, the transistor Q15 and the output transistor Q14 is also shielded.
申请公布号 JP2003133939(A) 申请公布日期 2003.05.09
申请号 JP20010329523 申请日期 2001.10.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 TANIGUCHI HIDEKI
分类号 H03K17/16;H03K17/687;H03K19/0175;H03K19/0185;(IPC1-7):H03K19/017;H03K19/018 主分类号 H03K17/16
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