发明名称 CONTROL CIRCUIT FOR NON-VOLATILE MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To prevent miss erasing and miswriting of a non-volatile memory equipped with an address holding circuit, having an reset signal input. SOLUTION: A reset control means is provided to a memory control circuit, equipped with an address hold circuit having an reset input. The reset control means delays a system reset signal RST1X, by at least the time interval until each control signal output from a register circuit 4 is initialized, namely, until a sequence of completion of operations of erasing and writing and outputs the system reset signal RST1X as a second system reset signal RST2X. An address hold circuit 2 initializes address data, in response to the second reset signal RST2X. Accordingly, when a reset signal is produced during performing of the sequence of write and erasure of the non-volatile memory, the miss erasing and miswriting of the non-volatile memory can be prevented surely.</p>
申请公布号 JP2003131951(A) 申请公布日期 2003.05.09
申请号 JP20010322173 申请日期 2001.10.19
申请人 SANYO ELECTRIC CO LTD 发明人 ICHIKAWA TAKASHI;OTA MASAYA;ARAI YOSHIMASA;FURUKAWA RIICHI;TANAKA SHIGEO;FUJIWARA RYOJI;KATO HIDEKAZU;OYAMADA YOSHITOSHI
分类号 G06F12/16;G06F15/78;G11C16/02;(IPC1-7):G06F12/16 主分类号 G06F12/16
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