METHOD FOR FORMING SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELL HAVING STRAP REGION AND PERIPHERAL LOGIC DEVICE REGION

摘要

PURPOSE: A method for forming a semiconductor array of a floating gate memory cell having a strap region and a peripheral logic device region, is provided to be capable of minimizing the number of masking steps and reducing the size of the semiconductor array. CONSTITUTION: The rows of strap regions(24) are interlaced to the rows of memory cell arrays(98). The rows of active regions(17) interlaced with the rows of isolation regions(16), are formed at the predetermined portions of the memory cell arrays. A pair of SL scrap cells(29) and a WL scrap cell(28) located between the pair of SL scrap cells, are formed at the predetermined portion of each row of each scrap region. At this time, the active regions adjacent to the WL scrap cells, are formed as a dummy region.