发明名称 APPARATUS AND METHOD FOR TRANSMITTING/RECEIVING ERROR DETECTION INFORMATION IN A COMMUNICATION SYSTEM
摘要 Disclosed is an apparatus for generating an error detection information bit sequence for determining a length of data sequence. The apparatus comprises a plurality of cascaded registers and a plurality of adders. During reception of the control information sequence, an operator generates the feedback bit sequence and provides the generated feedback bit sequence to the adders. After completion of receiving it, the operator sequentially adds a preset input bit to output bits of the final register and outputs the result. An initial value controller provides the registers with a selected one of two initial values.
申请公布号 WO03039056(A1) 申请公布日期 2003.05.08
申请号 WO2002KR01999 申请日期 2002.10.25
申请人 SAMSUNG ELECTRONICS CO., LTD 发明人 KIM, DONG-HEE;CHOI, HO-KYU;KIM, YOUN-SUN;KWON, HWAN-JOON
分类号 H03K3/84;G06F1/00;H03M13/09;H04B7/216;H04L1/00;H04L1/08;H04L1/20;H04L1/22 主分类号 H03K3/84
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