发明名称 Clock rate matching for independent networks
摘要 The clock rate matching appts for independent networks includes a memory (400), microprocessor (405) and a digital signal processor (406). A PCM signal is received by an analog/PCM block (124) and the clock (CLK1) extracted by a modem (126). The modem extracts the data and passes it to a memory (400) at the extracted clock speed. The data is clocked out of the buffer by a separate clock (CLK2). The difference in clock speeds is measured by the movement of the buffer pointers. In order to match the two clock rates, bits are added or deleted from the exit path of the memory.
申请公布号 DE4244920(C2) 申请公布日期 2003.05.08
申请号 DE19924244920 申请日期 1992.02.10
申请人 MOTOROLA, INC. 发明人 AVERBUCH, NIMROD;SCHATZ, STEVEN, V.,
分类号 G06F5/06;H04J3/07;H04J3/16;H04L25/05;H04W88/18;(IPC1-7):H04J3/06;H04Q7/24;H04B7/26 主分类号 G06F5/06
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