发明名称 Method and apparatus for analyzing a layout using an instance-based representation
摘要 One embodiment of the invention provides a system that analyzes a layout related to a circuit on a semiconductor chip using an instance-based representation of a set of geometrical features that comprise the layout. The system operates by receiving a representation of the layout, wherein the representation defines a plurality of nodes that include one or more geometrical features. Next, the system converts the representation into an instance-based representation by identifying multiple occurrences of identical node instances in the layout, wherein each node instance can be further processed without having to consider effects of external factors on the node instance. The system then performs an further processing on the instance-based representation by processing each node instance only once, whereby the processing does not have to be repeated on multiple occurrences of the node instance in the layout.
申请公布号 US6560766(B2) 申请公布日期 2003.05.06
申请号 US20010917526 申请日期 2001.07.26
申请人 NUMERICAL TECHNOLOGIES, INC. 发明人 PIERRAT CHRISTOPHE;LIN CHIN-HSEN;WANG YAO-TING;CHANG FANG-CHENG
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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