发明名称 |
Memory cell decoder not including a charge pump |
摘要 |
A memory cell decoder includes a first node and a first transmitting portion adapted to output a high voltage signal to the first node responsive to a first selection signal. A control portion is adapted to generate a first control signal responsive to an address and discharge the first node responsive to the first control signal. A second transmitting portion is adapted to output a word line enable signal responsive to the first selection signal and the first control signal. A semiconductor memory device includes: a memory cell array having an array of memory cells; a plurality of word lines corresponding to the memory cells; a plurality of memory cell decoders adapted to select word lines responsive to an address; a first pre decoder adapted to decode the address and generate a plurality of block selection signals, the block selection signals selecting predetermined corresponding blocks in the memory cell decoders; a second pre decoder adapted to generate a plurality of word line enable signals responsive to the address, the word line enable signals for enabling corresponding word lines responsive to the address.
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申请公布号 |
US6560162(B2) |
申请公布日期 |
2003.05.06 |
申请号 |
US20010010625 |
申请日期 |
2001.11.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KWON SEOK-CHEON |
分类号 |
G11C16/06;G11C8/10;G11C16/08;G11C16/30;(IPC1-7):G11C8/00 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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