| 摘要 |
An integrated wafer level board/card assembly method combines wafer level packaging, testing and assembly process. The integrated process includes the steps of first wafer sorting, laser repairing, second wafer sorting, wafer level burn-in, wafer level packaging, final testing, wafer sawing and board/card assembly. Information including wafer mapping and yield data of a process step is used as the input data to a next process step. Burn-in circuits and internal probing pads are built in the dice of the wafer to enable wafer level burn-in. A wafer cassette is used to move wafers between steps. Probers are used as the primary equipment in many steps to provide automatic wafer loading and testing. A multi-chip module die bonder, an IR re-flow system and an open/short tester form an automatic in-line system to accomplish the step of assembling a plurality of integrated circuit chips on a PC board.
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