METHOD AND APPARATUS FOR AUTOMATICALLY TESTING THE DESIGN OF A SIMULATED INTEGRATED CIRCUIT,申请号EP19980952916-传众专利搜索

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发明名称	METHOD AND APPARATUS FOR AUTOMATICALLY TESTING THE DESIGN OF A SIMULATED INTEGRATED CIRCUIT
摘要
申请公布号	EP1070297(B1)	申请公布日期	2003.05.02
申请号	EP19980952916	申请日期	1998.11.11
申请人	VIRATA LIMITED	发明人	BAKER, DAVID
分类号	G06F11/26;G01R31/3185;(IPC1-7):G06F17/50	主分类号	G06F11/26
代理机构		代理人
主权项
地址

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