发明名称 Data extraction circuit used for serial transmission of data signals between communication devices having different clock signal sources
摘要 <p>A data extraction circuit includes a determination circuit (10) which determines a sampling clock which is optimum for reproduction of reception data supplied from the exterior based on phase information of multi-phase clocks (CK1 to CKn) corresponding to an edge of the reception data. Further, the data extraction circuit includes a selection circuit (20) which selects one clock which is optimum for reproduction of the reception data according to the multi-phase clocks (CK1 to CKn) based on the result of determination in the determination circuit (10). In addition, the data extraction circuit includes a reproduction circuit (30) which reproduces the reception data according to the one optimum clock selected by the selection circuit (20). &lt;IMAGE&gt;</p>
申请公布号 EP1306999(A2) 申请公布日期 2003.05.02
申请号 EP20020024432 申请日期 2002.10.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKADA, SHUICHI
分类号 H04L7/02;H04L7/033;(IPC1-7):H04L7/033 主分类号 H04L7/02
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