发明名称 Hole grid array package and socket technology
摘要 A chip interface assembly and method of assembling a chip interface provide enhanced performance. The chip interface assembly includes a semiconductor package and a socket. The semiconductor package has a female contact architecture, where the female contact architecture is mated with a male contact architecture of the socket. By reversing the traditional male/female arrangement of conventional interconnection interfaces, difficulties associated with signaling throughput, clearance, hardware complexity and electrical losses can be obviated.
申请公布号 US2003079908(A1) 申请公布日期 2003.05.01
申请号 US20010985126 申请日期 2001.11.01
申请人 STONE BRENT S. 发明人 STONE BRENT S.
分类号 H01L23/498;H05K7/10;(IPC1-7):H05K1/16 主分类号 H01L23/498
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