| 摘要 |
PURPOSE: A PLL(Phase Locked Loop) phase lock system is provided to obtain a rapid locking time and a VCO output containing low noise. CONSTITUTION: According to the PLL phase lock system, a phase comparator(201) compares a signal having a reference frequency with an intermediate frequency signal. A loop filter(202) smooths a difference signal of two signals being output from the phase comparator. A voltage controlled oscillator(VCO)(204) converts an oscillation frequency according to the signal smoothed in the loop filter. An adder(205) adds signals being output from the voltage controlled oscillator. A divider(206) divides an oscillation frequency signal being output from the adder. And a controller(203) controls a bandwidth by controlling the loop filter.
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