MEMORY CELL WITH VERTICAL FLOATING GATE TRANSISTOR

摘要

A semiconductor device (8) includes a substrate (10) having a trench (18) formed therein. A gate structure for a vertical transistor is formed adjacent to a sidewall of the trench. The gate structure includes a floating gate conductor (52) formed in contact with sidewalls of the trench. The floating gate forms a void in a center portion of the floating gate conductor, and the center portion has vertically disposed surfaces. A dielectric layer (46) lines the void in the center portion of the floating gate conductor, and a control gate (48) conductor is formed in contact with the dielectric layer. The control gate conductor fills the void in the center portion of the floating gate conductor. Methods for fabricating the semiconductor device are also disclosed.