发明名称 BIT LINE SENSE AMPLIFIER FOR RESTRAINING PULL-UP VOLTAGE OF BIT SIGNAL AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME
摘要 PURPOSE: A bit line sense amplifier for restraining a pull-up voltage of a bit signal and a semiconductor memory device having the same are provided to prevent unnecessary power consumption and stress by restraining a rising voltage of a pull-up terminal. CONSTITUTION: An amplification portion(401) is formed with the first and the second inverters. The first inverter is formed with the first PMOS transistor(401a) and the first NMOS transistor(401b). The second inverter is formed with the second PMOS transistor(401c) and the second NMOS transistor(401d). Each source of the first and the second PMOS transistors(401a,401c) is commonly connected with a pull-up terminal(N402). Each source of the first and the second NMOS transistors(401b,401d) is commonly connected with a pull-down terminal(N404). A pull-up portion(403) is formed with an NMOS pull-up transistor(403a) and a PMOS transistor(403b). A pull-down portion(505) is formed with an NMOS pull-down transistor(405a) having a drain connected with the pull-down terminal(N404) and a source connected with an earth voltage(VSS).
申请公布号 KR20030033551(A) 申请公布日期 2003.05.01
申请号 KR20010065574 申请日期 2001.10.24
申请人 TLI INC. 发明人 HONG, SUN WON
分类号 G11C7/06;(IPC1-7):G11C7/06 主分类号 G11C7/06
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