| 摘要 |
The present invention provides a verification method capable of verifying a semiconductor testing apparatus and/or method with reliability, and also provides a semiconductor device for use in the verification. Spare elements in predetermined locations in a spare region of the semiconductor device are intentionally provided with defects and whether the semiconductor testing apparatus and/or method can detect those defects with reliability is checked for verification of the semiconductor testing apparatus and/or method. First and second spare regions (2, 4) are provided as spare regions for a memory array (8), with defects being intentionally produced in memory cells in predetermined locations in the second spare region (4). Switching between memory cells in the memory array (8) and those in the first and second spare regions (2, 4) is done by a control circuit (9). Which ones of the memory cells are to be switched is indicated to the control circuit (9) by blowing desired fuses in LT fuse groups (1, 3) corresponding respectively to the first and second spare regions (2, 4).
|
