发明名称 Fast mono-cycle generating circuit using full rail swing logic circuits
摘要 A mono-cycle generating circuit comprises a control circuit, a multiplexer, and a driver switch circuit. The control circuit generates sets of timing pulses. The multiplexer selects one of the sets of timing pulses. The driver switch circuit outputs a mono-cycle based upon the selected set of timing pulses. The driver switch circuit comprises complementary sets of switches, each complementary set of switches including complementary amplitude pull-up/pull-down functions such that the output mono-cycle is a full rail swing mono-cycle.
申请公布号 US2003080799(A1) 申请公布日期 2003.05.01
申请号 US20020235845 申请日期 2002.09.06
申请人 OCHOA AGUSTIN;HUYNH PHUONG T.;MCCORKLE JOHN 发明人 OCHOA AGUSTIN;HUYNH PHUONG T.;MCCORKLE JOHN
分类号 H03K5/05;H03K5/151;H03K7/04;(IPC1-7):H03K17/62;H03K17/693 主分类号 H03K5/05
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