System and method for encoding processing element commands in an active memory device

摘要

A command engine for an active memory receives high level tasks from a host and generates corresponding sets of either DRAM control unit ("DCU") commands to a DRAM control unit or array control unit ("ACU") commands to a processing array control unit. The DCU commands include memory addresses, which are also generated by the command engine, and the ACU command include instruction memory addresses corresponding to an address in the ACU where processing array instructions are stored. The processing array instructions are used to address a decode SRAM containing microinstructions that are used to control the operation of an array of processing elements. The number of bits in each of the microinstructions is substantially greater than the number of bits in the corresponding processing array instruction. The decode SRAM is preferably loaded prior to operation of the active memory based on the operations to be performed by the processing elements.