发明名称 |
Microcomputer debug architecture and method |
摘要 |
A computer system, comprising at least one central processing unit and a memory unit coupled to the at least one central processing unit, a set of watchpoints defined in the computer system; each watchpoint in the set of watchpoints comprising a programmable precondition register and a programmable action register, a set of latches, and selection circuitry that selects one latch in the set of latches to couple an output of an action register to an input of the selected latch.
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申请公布号 |
US6557119(B1) |
申请公布日期 |
2003.04.29 |
申请号 |
US19990411786 |
申请日期 |
1999.10.01 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
EDWARDS DAVID ALAN;RICH ANTHONY WILLIS |
分类号 |
G06F11/28;G06F11/36;G06F15/78;(IPC1-7):G06F9/45 |
主分类号 |
G06F11/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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