| 摘要 |
One embodiment of the present invention provides a system that facilitates prototyping asynchronous circuits. The system first receives a design of an asynchronous circuit, which includes asynchronous cells. The system maps the asynchronous cells of the asynchronous circuit onto clocked synchronous cells within a logic array or programmable logic array device such as standard-cell gate-arrays and field-programmable gate-arrays. The mapping delays the generation of the asynchronous clock events until the next clock event, thus preserving the full functionality of the asynchronous circuit. The system then implements the mapped circuit on the synchronous device to perform the functions that are mapped from the asynchronous circuit. Finally, the system operates the synchronous device, and the results of operating the synchronous device are used to verify the design of the asynchronous circuit.
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