发明名称 |
Semiconductor device having embedded array |
摘要 |
A semiconductor integrated circuit having an embedded array wherein basic cells are arranged in a matrix is designed and manufactured (S1); a test is performed on whether an electrical behavior of a prototype of a semiconductor integrated circuit meets required specifications (S2); if meets, a non-use-area pattern in an embedded array area is detected and removed based on layout data of contact holes to get modified pattern (S4); a mask with a modified pattern is prepared (S5); and the mask is substituted for the mask before modification, thereby manufacturing a semiconductor integrated circuits from which a non-use area is removed (S6).
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申请公布号 |
US6555853(B2) |
申请公布日期 |
2003.04.29 |
申请号 |
US19990427693 |
申请日期 |
1999.10.27 |
申请人 |
FUJITSU LIMITED |
发明人 |
YOKOTA NOBORU;OBA HISAYOSHI;KOSUGI NOBORU;TAHARA MUNEHIRO |
分类号 |
H01L21/8234;G01R31/28;H01L21/66;H01L21/76;H01L21/82;H01L23/544;H01L27/088;H01L27/118;(IPC1-7):H01C27/10 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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