发明名称 FPGA with improved structure for implementing large multiplexers
摘要 Novel structures for implementing wide multiplexers from user designs in FPGA CLBs. Input multiplexers providing the function generator data input signals are modified to function not just based on values stored in configuration memory cells, but also under the control of user signals. Thus, the input multiplexers of the invention are much more flexible than traditional input multiplexers. In one embodiment, the improved data input multiplexer is provided on two of four data input terminals of the function generator, enabling the implementation of an 8-to-1 multiplexer using only a single function generator. Another embodiment applies the concept of mixed memory cell and user control of a multiplexer to the general interconnect structure of an FPGA.
申请公布号 US6556042(B1) 申请公布日期 2003.04.29
申请号 US20020080103 申请日期 2002.02.20
申请人 XILINX, INC. 发明人 KAVIANI ALIREZA S.
分类号 H03K19/173;(IPC1-7):H03K19/177;H03K17/62 主分类号 H03K19/173
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