Semiconductor storage device and method of testing the same

摘要

A dynamic random access memory (DRAM) whose charge-holding characteristic regarding a leak of an electric charge through the bit line is tested in a short time is provided. The DRAM comprises a memory cell array including memory cells arranged at intersections of word lines and bit lines, plural sense amplifiers disposed at a pair of the bit lines, plural bit line pre-charge circuits for pre-charging and equalizing a potential in the pair of the bit lines, and a switching circuit for selecting an ordinary operation mode or a test mode. It further comprises a word line deactivator for deactivating all of word lines in the test mode, a sense amplifier deactivator for deactivating all of sense amplifiers in the test mode, and a bit line potential fixing circuit for fixing the bit lines to the same logic level of a high or a low level in the test mode.