发明名称 |
System and method for redundancy implementation in a semiconductor device |
摘要 |
A system and method for redundancy implementation in an integrated semiconductor device having at least one memory instance that includes a prime memory array and a redundant portion. A fuse box register is provided outside the memory macro cell associated with the memory instance. The fuse box register is operable to store location information pertaining to a faulty portion in the prime memory array. A redundancy scan storage element in the memory instance is operable to receive the location information from the fuse box register, which location information is used for replacing at least a part of the faulty portion in the prime memory array with at least a part of the redundant portion.
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申请公布号 |
US6556490(B2) |
申请公布日期 |
2003.04.29 |
申请号 |
US20020099750 |
申请日期 |
2002.03.15 |
申请人 |
VIRAGE LOGIC CORP. |
发明人 |
SHUBAT ALEX;HONG CHANG HEE |
分类号 |
G11C29/00;(IPC1-7):G11C7/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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