发明名称 |
CIRCUIT FOR PREVENTING ERRONEOUS OPERATION IN POWER ON RESET |
摘要 |
PURPOSE: A circuit for preventing erroneous operation in power on reset is provided to prevent erroneous operation of a magnetic head by doubly resetting a gate array in power on reset. CONSTITUTION: A power on reset signal generated in power on reset is applied to a reset terminal of a CPU(10) and an OR gate(14) in a hard disk drive. The CPU is reset to generate a reset signal, and applies the reset signal to the OR gate. The OR gate generates a high state signal if any one of the power on reset signal and the reset signal is in a high state. The high state signal generated from the OR gate is applied to a reset terminal of a gate array(12). The gate array is reset according to the signal generated from the OR gate and the reset signal generated from the CPU.
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申请公布号 |
KR100383641(B1) |
申请公布日期 |
2003.04.29 |
申请号 |
KR19960000290 |
申请日期 |
1996.01.09 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
MUN, BEOM SU |
分类号 |
G11B33/12;(IPC1-7):G11B33/12 |
主分类号 |
G11B33/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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