发明名称 MEMORY DEVICE FOR APPLICATION IN HIGH-SPEED PIPELINE REED-SOLOMON DECODER, MEMORY ACCESS METHOD AND REED-SOLOMON DECODER COMPRISING THE MEMORY DEVICE
摘要 PURPOSE: A memory device for application in a high-speed pipeline Reed-Solomon decoder, a memory access method and a Reed-Solomon decoder comprising the memory device are provided to increase the memory access speed in a high-speed block pipeline Reed-Solomon decoder to operate a memory device at a high speed. CONSTITUTION: A RAM(180) having six banks comprises a cyclic buffer controller(300) and a bank block(301). The bank block(301) comprises first to six banks (310-360). The cyclic buffer controller(301) outputs a read/write command(RD/WR) and a bank selection signal(BS) to the first to six banks(310-360). The bank signal(BS) for selecting one of the six banks(310-360) is composed of three bits. The bank selection signal(BS) is termed address. The read command(RD) is a signal commanding the reading of data stored in a selected bank, while the write command(WR) is a signal commanding the writing of data into the bank selected by the bank selection signal(BS).
申请公布号 KR20030032304(A) 申请公布日期 2003.04.26
申请号 KR20010064015 申请日期 2001.10.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 BAE, IL MAN;KWON, HYEONG JUN
分类号 G11C7/00;G06F11/10;G11C7/10;G11C8/12;H03M13/15;(IPC1-7):G11C7/00 主分类号 G11C7/00
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