发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To manufacture two types of shrunk MOS transistors having gate post-oxide films of different thicknesses by a Levenson method using a Trim mask and an Alt mask. SOLUTION: The semiconductor device comprises a first MOS transistor including a gate electrode 28 having a gate width Le, and a gate post-oxide film 30 provided on the circumferential side face of the gate electrode, and a second MOS transistor including a gate electrode 32 having a gate width Li smaller than the gate width Le of the gate electrode of the first MOS transistor, and a gate post-oxide film 33 provided on the circumferential side face of the gate electrode, at least a part of which is different in thickness from that of the gate post-oxide film 30.
申请公布号 JP2003124339(A) 申请公布日期 2003.04.25
申请号 JP20010314164 申请日期 2001.10.11
申请人 TOSHIBA CORP 发明人 CHIKAMATSU NAOHITO
分类号 G03F7/20;H01L21/00;H01L21/027;H01L21/28;H01L21/3213;H01L21/336;H01L21/822;H01L21/8234;H01L21/8238;H01L21/8242;H01L27/02;H01L27/08;H01L27/088;H01L27/10;H01L27/108;H01L29/76;H01L29/94;H01L31/0328;H01L31/062;H01L31/113;H01L31/119 主分类号 G03F7/20
代理机构 代理人
主权项
地址