发明名称 EMI REDUCING PLL
摘要 PROBLEM TO BE SOLVED: To provide an EMI reducing PLL which can freely control a modulation frequency and a modulation rate although the PLL is not sensitive to the manufacturing process and has low power consumption and small layout area. SOLUTION: The purpose is achieved by determining the modulation rate for the output signal of a VCO by controlling a signal having a delay time which is an integral multiple of a reference delay time, i.e., a phase difference and repeating a process like this in cycles corresponding to the specific modulation frequency. This EMI reducing PLL not only reduces EMI, but also has the advantages that the layout area becomes relatively small since no ROM is used to obtain wide-band frequencies. Further, the advantage that there is no influence of process changes since the phase difference from the output signal of the VCO is controlled by a logic circuit is provided.
申请公布号 JP2003124805(A) 申请公布日期 2003.04.25
申请号 JP20020273147 申请日期 2002.09.19
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 JEON PHIL-JAE;LEE MYOUNG-SU
分类号 H03L7/08;H03C3/09;H03L7/099;H03L7/18 主分类号 H03L7/08
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