发明名称 BARE CHIP MOUNTING METHOD AND MOUNTING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a bare chip mounting method and a mounting system capable of preventing faulty conduction between an IC chip and a circuit substrate due to chips produces upon dicing of a semiconductor wafer and reducing the loss of a time and a labor. SOLUTION: A previous process comprises a dicing process for dividing a conductor wafer 1 into each IC chip 7 under a condition that the wafer 1 is mounted on transfer equipment 2, a washing process for washing the semiconductor wafer 1 after the dicing, a bump bonding process for transferring the semiconductor wafer 1, whose washing is finished, to an assembling process under a condition that the wafer 1 is mounted on the transfer equipment 2 to form a bump on the electrode pad of the semiconductor wafer 1 and a mounting process for mounting the respective IC chips 7, on which the bump is formed, onto a circuit forming body.
申请公布号 JP2003124253(A) 申请公布日期 2003.04.25
申请号 JP20010314210 申请日期 2001.10.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TOKUNAGA TETSUYA;YONEZAWA TAKAHIRO;KIYOMURA HIROYUKI;SASAOKA TATSUO;HORIE SATOSHI
分类号 H01L21/60;H01L21/68 主分类号 H01L21/60
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