| 摘要 |
PROBLEM TO BE SOLVED: To suppress the generation of a vertical line and a ghost when carrying out horizontal driving in a clock drive mode by achieving non complete overlap sampling. SOLUTION: A horizontal drive circuit 17 is provided with a shift register which carries out a shift action synchronizing with a first clock signal HCK and successively outputs a shift pulse from each shift state, a first switch group which samples a second clock signal DCK in response to the shift pulse, and a second switch group which samples a video signal inputted successively in response to the second clock signal DCK sampled by each switch of the first switch group and supplies it to each signal line 12. An external clock generating circuit 18 is arranged outside a panel 33 to supply the second clock signal DCK from the outside. An internal clock generating circuit 19 is formed in a panel 33, and supplies the first clock signal HCK to the horizontal drive circuit 17 on the basis of the second clock signal DCK.
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