发明名称 DISPLAY CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a display controller in which power consumption is efficiently suppressed and a high speed plotting is conducted. SOLUTION: A UMA constitution is adopted by using an SDRAM 12 as a display memory (a VRAM 13) and a CPU 11 directly writes display data into the VRAM 13 and the display data of the VRAM 13 are DMA transferred to a virtual VRAM 15 in a display controller 14 to display the data on a screen. Thus, the CPU 11 writes the display data into the VRAM 13 in a high speed and displays the data. Moreover, by assembling a data transfer controller 16 which controls DMA transfer operations from the VRAM 13 to the virtual VRAM 15 in accordance with the operating mode of the CPU 11, into the controller 14, useless transfer operations are stopped when the CPU 11 is in its standby mode and no rewriting of the display data is conducted and power consumption is efficiently suppressed.
申请公布号 JP2003122335(A) 申请公布日期 2003.04.25
申请号 JP20010319576 申请日期 2001.10.17
申请人 CASIO COMPUT CO LTD 发明人 MINAMI TAKESHI
分类号 G06F12/00;G06F13/16;G09G5/00;G09G5/393;G09G5/397;G09G5/399;(IPC1-7):G09G5/00 主分类号 G06F12/00
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