发明名称 Effective use of parallel scan for identically instantiated sequential blocks
摘要 A method and system employing a plurality of modules having a scan chain combiner coupled to the output of each one of the plurality of modules. The scan chain combiner selects one value per scan chain received from said plurality of modules, wherein the value is indicative of errors in at least one of the plurality of modules. An output mux for communicating the value to a tester via a plurality of chip outputs is coupled to the scan chain combiner.
申请公布号 US2003079165(A1) 申请公布日期 2003.04.24
申请号 US20010053389 申请日期 2001.10.23
申请人 FFRENCH NIALL;PUNSHI ARJUN 发明人 FFRENCH NIALL;PUNSHI ARJUN
分类号 G01R31/3185;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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