发明名称 |
CONFIGURABLE ASIC MEMORY BIST CONTROLLER EMPLOYING MULTIPLE STATE MACHINES |
摘要 |
A method and apparatus for performing a memory built-in self-test for an integrated circuit are disclosed. The technique includes a memory built-in self-test controller including a plurality of alternative memory built-in self-test state machines and a memory built-in self-test engine operating a predetermined one of the memory built-in self-test state machines. It also includes a method for performing a built-in self-test on an integrated circuit device. The method includes externally resetting a predetermined one of a plurality of memory state machines in a memory built-in self-test controller; performing a memory built-in self-test utilizing the reset memory state machine; and obtaining the results of the performed memory built-in self-test.
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申请公布号 |
WO03034440(A2) |
申请公布日期 |
2003.04.24 |
申请号 |
WO2002US32058 |
申请日期 |
2002.10.07 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
DORSEY, MICHAEL, C. |
分类号 |
G01R31/317;G11C29/16;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/317 |
代理机构 |
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