发明名称 DEBUGGING OF PROCESSORS
摘要 <p>Processor circuitry such as a 'system-on-chip' (SOC) device comprises a processing unit (22) and a processor debug unit (24) which generates one or more debug information signals for the processing unit. A system debug unit (26) is connected with the processor debug unit by a signal path (34), and receives each debug information signal and outputs one or more further signals derived therefrom to further circuitry (7). Message transfer circuitry (25, 28, 29, 30) transfers one or more messages, each including at least one debug information signal, from the processor debug unit to the system debug unit via the signal path. At least one said message has a number of bits greater than a width of the signal path (34), and the message transfer circuitry transfers that message from the processor debug unit to said system debug unit in a series of message cycles. Such processor circuitry can enable a rich set of debug information signals to be transferred from the processor debug unit to the system debug unit without extensive interconnect between them. More and more one processor debug unit may be supported by the same system debug unit.</p>
申请公布号 WO2003034225(A2) 申请公布日期 2003.04.24
申请号 GB2002004548 申请日期 2002.10.07
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