Circuit for reducing degradation of field effect transistor, has auxiliary transistor arranged in parallel with FET and driven by control signal that reduces degradation of FET

摘要

An auxiliary transistor (D) is arranged in parallel with the field effect transistor (C), and is driven via an auxiliary control signal (d), in a way that reduces the degradation of the field effect transistor. A second field effect transistor (B) may be connected in series with the parallel arrangement of the first field effect transistor and the auxiliary transistor, and driven via a second control signal (b) in cascode connection. Independent claims are also included for a method for reducing the degradation of a field effect transistor, and for the use of the circuit for outputting a low level via the output driver stage.