Efficient implementation of a decision directed phase locked loop (DD-PLL) for use with short block code in digital communication systems

摘要

A decision directed phase locked loop (DD-PLL) is efficiently implemented in a communication receiver. The phase locked loop includes an enhanced block decoder inside a phase detector which takes in the baseband complex samples and the current channel phase estimate (or the tracked phase) and generates a feedback phase error term. A loop filter filters the phase error terms and a phase accumulator updates the tracked phase estimate on each iteration of the loop.