发明名称 ADAPTIVE LEVEL BINARY LOGIC
摘要 A digital logic interface circuit makes use of a logic signal representative of a logic signaling level definition, to determine the logic swing amplitude of signals from a given source adopting the same logic signaling level definition. The digital logic interface circuit generates a threshold level from the logic swing amplitude thus determined, and compares digital logic input signals against the threshold level in order to discriminate different logic levels in the digital logic input signals. The comparison result is provided as digital interface output signals adopting a predetermined logic signaling level definition for use by subsequent system sections. Examples of such representative signals are the digital input logic signals themselves, clock signals or line encoded signals. Other examples can be mode control signals or NRZ signals.
申请公布号 WO03034592(A1) 申请公布日期 2003.04.24
申请号 WO2001EP12022 申请日期 2001.10.17
申请人 OPTILLION AB;HAULIN, TORD 发明人 HAULIN, TORD
分类号 G01R19/04;H03K5/08;H03K19/0185;(IPC1-7):H03K19/018 主分类号 G01R19/04
代理机构 代理人
主权项
地址