A multi-layer inductor formed in a semiconductor

摘要

An integrated circuit structure or a method of making the same comprises a semiconductor substrate above which is formed two conductive layers 34, 110 which are interconnected using conductive vias 65 - 68 to form a helical inductor structure. The conductive layers and vias may be formed as copper runners or strips using a single or dual damascene process and/or other conventional semiconductor processes. Each end of each of the upper runners 108 may be arranged to overlie and connect with respective opposite ends of two lower runners 34 by means of interconnecting via stacks 120, 122 (65-68). The inductor structure may span a number of conductive layers which are not connected to the inductor. This inductor formation may be compatible with the processing involved in forming a CMOS device. It may also provide a compact thin-film multi-layer high Q inductor which is part of a multi-module device constructed on a common substrate.