| 摘要 |
A parasitic transistor of an insulated gate semiconductor device does not easily turn on, so that an SOA of the insulated gate semiconductor device is improved. N<+> emitter layers (44) are formed on a surface of a P base layer (43) of a U-type IGBT so as to leave an exposed surface of the P base layer (43) in a scattered configuration. An emitter electrode (51) contacts link portions (55) of the N<+> emitter layers (44) and the exposed surfaces of the P base layer (43), alternatively. A trench pitch is small, and therefore, a parasitic transistor which is formed by an N<+> emitter region (4), a P base layer (3) and an N<-> layer (2) does not easily turn on. <IMAGE> |
