发明名称 |
Circuitry, architecture and method(s) for synchronizing data |
摘要 |
An apparatus comprising a first programmable circuit configured to present (i) a first parallel data signal and (ii) a first control signal in response to one or more serial data signals and a second programmable circuit configured to generate a second parallel data signal in response to (i) the first parallel data signal, (ii) the first control signal and (iii) a second control signal.
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申请公布号 |
US6553503(B1) |
申请公布日期 |
2003.04.22 |
申请号 |
US19990391865 |
申请日期 |
1999.09.08 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
LI GABRIEL |
分类号 |
G06F5/14;H04J3/06;H04L7/04;H04L25/14;(IPC1-7):G06F1/04 |
主分类号 |
G06F5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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