| 摘要 |
The invention relates to a dual-port DRAM memory location having a capacitor and two transfer gates whose load paths are connected in series. The series connection is arranged between two data transmission lines. This arrangement serves to provide a dual-port memory location which independent of one another, can be read or written by two data processing units. The decisive advantage of the inventive memory locations in a DRAM memory architecture is the size-optimized design. The possibility of providing a memory architecture with substantially reduce space requirements. The inventive memory location is very immune to noise due to its design, due to the small number of switching elements and short length of conductor paths. The small number of transistors and short length of conductor paths also permits to reduce the time required for accessing the data. The invention also relates to a DRAM semiconductor memory having dual-port memory locations.
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