| 摘要 |
PROBLEM TO BE SOLVED: To provide a level converting circuit which curtails the number of terminals and lowers the power consumption, and a developing circuit equipped with the level converting circuit. SOLUTION: This circuit is equipped with first to third MOS transistors MP1, MN3, and MP2 which are connected in series between a power source on high potential side and a power source on low potential side, a capacitor C2 which is connected to the junction between the first and second MOS transistors MP1 and MN3, a fourth MOS transistor MN1 which is connected between the input terminal and the gate terminal of the third MOS transistor MN2, and a capacitor C1 which is connected to the gate of the third MOS transistor MN2. Sampling pulse signals SMP are inputted in common to the gates of the first and second MOS transistors MP1 and MN3, and a reverse signal XSMP to the sampling pulse signal SMP is inputted into the gate of the fourth MOS transistor MN1. |
