| 摘要 |
PURPOSE: A circuit for controlling a macro block level of a video decoder is provided to increase utility of a CPU, simply design a program or a whole integrated circuit, and reduce power consumption. CONSTITUTION: A CI(Co-processor Interface)(602) interfaces with a CPU for co-processing video decoding. A CR(Control Register)(604) interfaces with the CI for setting up a control value for controlling a decoding controller, or reading the state of the decoding controller and each decoding block. A DI(Debugging Interface)(606) interfaces with the CR for generating interrupt in operating each decoding block or after terminating operation. An SM(State Machine)(608) interfaces with the DI for managing a macro block state of the decoding controller and commanding operation of the next decoding block after terminating the operation of the currently operating decoding block. A DBI(Decoding Block Interface)(610) interfaces with the DI for commanding a start of the operation or receiving a terminating signal, and outputting the interrupt to the CPU. A plurality of DB(Decoding Block)s(612a,612b,...,612n) interface with the DBI for constructing the video decoder. |
