发明名称 SEMICONDUCTOR DEVICE AND ITS DESIGNING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a wiring structure suited for preventing the deterioration of a gate insulation film and the generation of a leak current caused leeg electric charges in the etching steps of metal wiring layers. SOLUTION: The semiconductor device comprises a semiconductor substrate 1, a cell 10 containing a plurality of transistors for realizing a specified circuit block, a first input wiring pattern 6a formed in the cell for connecting to gate electrodes of transistors at the input stage of the circuit block on a first wiring layer, a second input wiring pattern 6b formed in/outside the cell for connecting to elements outside the cell on the first wiring layer, and a third input wiring pattern 8a formed in the cell for electrically connecting the first input wiring pattern with the second input wiring pattern on a second wiring layer.
申请公布号 JP2003115490(A) 申请公布日期 2003.04.18
申请号 JP20010307019 申请日期 2001.10.03
申请人 SEIKO EPSON CORP 发明人 KURASHIMA KENJI
分类号 H01L21/3213;H01L21/82;(IPC1-7):H01L21/321 主分类号 H01L21/3213
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