发明名称 LOW POWER WIRED OR
摘要 A low power wired OR circuit of the present invention comprises a plurality of logic blocks for pulling a wired OR signal line low in response to certain conditions, a differential pair of lines, such as the wired OR signal line and a reference signal line, and a sensing device coupled to the reference signal line and the wired OR signal line to receive the wired OR signal and the reference signal respectively and to detect a difference between the two signals. Having a differential pair of lines is advantageous because it maintains noise immunity for small voltage swings on the wired OR signal line, thereby reducing power dissipation in the wired OR circuit. A common current source coupled to each logic block through a common return path allows the low power wired OR circuit to control a discharge rate at which the wired OR line discharges.
申请公布号 WO02067427(A9) 申请公布日期 2003.04.17
申请号 WO2001US47520 申请日期 2001.11.09
申请人 FAST-CHIP, INC. 发明人 HENDERSON, ALEX, E.;CROFT, WALTER, E.
分类号 G11C15/04;H03K19/017;H03K19/20;(IPC1-7):H03K19/00 主分类号 G11C15/04
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