发明名称 ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES
摘要 <p>Error detection circuitry is provided on a programmable logic resource. Programmable logic resource configuration data is loaded into a cyclic redundancy check (CRC) module where a checksum calculation may be performed. In one embodiment, the checksum may be compared to an expected value, which is a precomputed checksum on data prior to being programmed into or while data is being programmed into a programmable logic resource. In another embodiment, the expected value may be included in the checksum calculation. An output indicating whether an error is detected may be generated depending on the relationship between the checksum and the expected value, or on the value of the checksum. This output may be sent to an output pin that is accessible by user logic.</p>
申请公布号 WO2003032159(A2) 申请公布日期 2003.04.17
申请号 US2002033395 申请日期 2002.10.10
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